How superconducting qubits work

A superconducting qubit is an electrical circuit, made with the same lithography as computer chips, that behaves like an artificial atom when it is cooled to about 10 millikelvin (mK). Google, IBM, AWS, Rigetti, Alice & Bob and others build quantum processors this way. Its gates take tens of nanoseconds, a full round of error correction about a microsecond, and it has a leading record in quantum error correction. Its costs are the refrigerator, the wiring, and qubits that keep their state for only a fraction of a millisecond.

This article is part of a series on the main ways to build a qubit. The overview compares all six side by side.

How the qubit forms

The circuit is made of a metal that superconducts when cold: aluminum, niobium or, increasingly, tantalum. Below about 1 kelvin (1.2 K for aluminum, 9 K for niobium) its electrons pair up and the metal carries current without resistance; near 10 mK the whole circuit acts as one quantum object with discrete energy levels and almost no thermal excitation. A plain circuit of a capacitor and an inductor would have evenly spaced levels, so a microwave pulse could not address just two of them.

The key ingredient is the Josephson junction: two layers of superconductor separated by an insulating barrier about 1 to 2 nanometers thick. It acts as a lossless, nonlinear inductor, which makes the energy levels unevenly spaced. The two lowest levels serve as the qubit's 0 and 1, and a microwave pulse tuned to the gap between them, typically 4 to 8 GHz, drives only that transition.

The most common design is the transmon: a junction, or a pair of junctions in a loop that makes the frequency tunable with magnetic flux, shunted by a large capacitor. The capacitor makes the qubit insensitive to stray electric charge. The price is a small unevenness in the levels, so control pulses must be shaped to avoid leaking into a third level. In Google's Willow processor the transmons keep their energy for 68 microseconds (µs) on average, a time called T1. Typical industrial transmons reach 100 to 300 µs, and Princeton reported a tantalum-on-silicon transmon with a T1 of 1.68 milliseconds (ms) in 2025.

Six designs, compared

The transmon is one of six superconducting qubit designs covered here. All use the same metals, junctions and refrigerators; they differ in where the 0 and 1 are kept, and so in which errors they suffer and which they suppress. In three designs the qubit is a state of the circuit itself. In the other three, called bosonic qubits, it is stored in microwave light in a resonator, and a junction circuit controls it.

Circuit and state sketches of the six designs, not to scale.

Transmon. The baseline described above: simple, fast and mature, at 4 to 6 GHz. Its levels are uneven by only 200 to 340 MHz, which invites leakage, and on large chips its frequencies crowd together.

Fluxonium adds a superinductor, such as a chain of about 100 larger junctions, and is biased with half a flux quantum. Its qubit frequency is low, 0.1 to 1 GHz, while the step to level 2 is several gigahertz larger, so leakage is rare. The low frequency also reduces dielectric loss: the University of Maryland reported coherence (T2) above 1 ms in its best device, and MIT reported 99.998% single-qubit fidelity in 2025 and 99.92% for a two-qubit gate on one pair in 2023. The cost is thermal excitation. At 10 to 20 mK a fluxonium qubit is left in its excited state with a probability of a few percent or more, depending on its frequency, so it needs active reset, and its superinductor is harder to make; multi-qubit devices are still few. Google acquired Atlantic Quantum, a fluxonium developer, in October 2025.

The 0-π qubit is a symmetric ring of two junctions, two superinductors and two large capacitors. Its energy has two equal valleys, at phase 0 and phase π, and the qubit's 0 and 1 sit in different valleys. In theory that protects it against both energy loss and dephasing. Its qubit frequency is very low, below about 100 MHz. The protection needs large, highly symmetric circuit elements that are hard to make, and it also makes the qubit hard to control and read out. Princeton realized one in 2021, and it remains a single-qubit physics demonstration.

Cat qubits (Alice & Bob, AWS) store 0 and 1 as two microwave oscillations of opposite phase in a resonator. A nonlinear junction circuit, the buffer, is driven and deliberately lossy: it adds and removes the resonator's photons only in pairs, which keeps the resonator in the space of those two oscillations. A bit flip would need the field to jump between the two, so bit flips become exponentially rarer as the mean number of photons grows. Alice & Bob reported bit flips about 7 minutes apart in 2024, and more than an hour apart at a mean of 11 photons in a preliminary result from September 2025. Phase flips, by contrast, grow in proportion to the photon number and occur on microsecond scales. Because the errors are so biased, a one-dimensional repetition code can handle the phase flips; AWS's Ocelot chip ran one at distance 5. The largest device shipped so far has 18 cat qubits (Alice & Bob's Helium system, a company figure).

Dual-rail qubits (Quantum Circuits, which D-Wave agreed to acquire in 2026) share a single microwave photon between two resonators: the photon in the first means 0, in the second means 1; AWS and Caltech have built a version from two coupled transmons. The most common error, losing the photon, leaves both resonators empty, a state outside the code that can be detected mid-circuit without disturbing the data. Errors at known locations, called erasures, are far cheaper to correct: in an idealized model, the surface code's threshold, the error rate per qubit below which a bigger code helps, is about 50% for erasures against about 19% for ordinary (depolarizing) errors; real circuits need far lower rates for both. The costs are two resonators and helper circuits per qubit, and scale so far: Quantum Circuits' Seeker system has 8 dual-rail qubits.

GKP qubits (Yale and Google, Nord Quantique) encode the qubit in a grid-shaped state of a resonator, a comb of sharp peaks in which 0 and 1 are offset by half a spacing. Photon loss and dephasing first appear as small shifts of the comb, which a helper transmon measures so that feedback can push the state back. Yale took a GKP qubit beyond break-even in 2023, and Yale and Google extended this to three- and four-level qudits in 2025, with gains of 1.82 and 1.87 over the best uncorrected encodings. The states are hard to prepare, and errors in the helper transmon can spread into the resonator.

Where they operate. The circuit designs differ most in frequency. A transmon sits far above the thermal energy of a refrigerator at 10 to 20 mK; a fluxonium overlaps it, which is why it needs active reset; and a 0-π qubit sits lower still. For a cat qubit the key setting is the number of photons, which trades bit flips against phase flips.

Frequency ranges from published devices, with thermal energy at 10 to 20 mK; the cat-qubit curves are schematic.

Which design leads where. Transmons run every large processor today and hold the leading surface-code results. Fluxonium has the highest published single-qubit fidelity of any superconducting qubit and two-qubit fidelities as high as the best transmon pairs, but few multi-qubit devices. Cat and dual-rail qubits aim to cut the cost of error correction by shaping the errors, biased in one case and flagged in the other. GKP codes correct small errors inside one resonator, and the 0-π qubit is a bet on protection built into the circuit.

Best reported results as of October 2026; preliminary results and company claims are marked.

How the processor is made

Superconducting processors are made much like conventional chips. Circuits are patterned on high-resistivity silicon or sapphire with optical or electron-beam lithography. Junctions are usually made by evaporating aluminum at two angles with a controlled oxidation in between. The barrier's thickness sets the qubit frequency, so a 1 to 3% spread in junction resistance becomes a frequency spread of tens of megahertz. IBM moved its main quantum wafer production to a 300 mm fab in Albany, New York, in 2025.

An Anyon Computing superconducting quantum processor.

Beyond about 100 qubits a flat chip runs out of room for wiring, so processors are now stacked. A qubit chip is bump-bonded face to face with a routing chip (Google's Willow, Rigetti, AWS Ocelot), and multilayer wiring and through-silicon vias carry the signals. Rigetti's 108-qubit Cepheus processor is tiled from twelve 9-qubit chiplets.

The chip then sits in a dilution refrigerator whose coldest stage runs at about 7 to 15 mK, inside magnetic and infrared shielding. Each qubit typically needs one to three coaxial lines from room temperature, with attenuators, filters, circulators and cryogenic amplifiers along the way.

How it is controlled and read out

Single-qubit gates are shaped microwave pulses at the qubit frequency, lasting about 20 to 50 nanoseconds (ns). Rotations about one axis are applied in software at no time cost. Google reports 99.97% single-qubit fidelity across Willow, and MIT reported 99.998% on a fluxonium qubit in 2025.

Two-qubit gates most often use a fast magnetic-flux pulse that brings two qubits briefly into resonance, with a tunable coupler between them that switches the interaction on only during the gate. These gates take about 25 to 70 ns. Across a whole processor, Willow's controlled-Z gates average 99.67% with all pairs running at once, and Rigetti reports a 99.1% median for Cepheus. The best peer-reviewed single pairs reach 99.90% for transmons (RIKEN and Toshiba, 2024) and 99.92% for fluxonium (MIT, 2023), and 2026 preprints report up to 99.92% on single transmon pairs. Cross-resonance gates, driven by microwaves alone, take 200 to 400 ns.

Readout is dispersive: each qubit is coupled to its own resonator, whose frequency shifts slightly with the qubit's state. A microwave tone probes the resonator, a quantum-limited amplifier boosts the signal, and room-temperature electronics digitize it. Readout takes about 200 to 800 ns at 99 to 99.5% fidelity in large processors, which makes it slower and noisier than the gates.

The payoff is speed in error correction. Willow completes a full surface-code cycle in 1.1 µs, about 909,000 cycles a second. In 2024 Google showed its logical error falling by a factor of 2.14 each time the code grew, from distance 3 to 5 to 7.

What makes it hard to scale

Wiring and heat. Today's systems need one to three coaxial lines per qubit, and a dilution refrigerator offers only tens of microwatts of cooling at 10 mK. A million-qubit machine cannot be wired this way.

Material defects. Microscopic two-level defects in the amorphous oxides at surfaces and interfaces absorb energy and drift in frequency, so a qubit's lifetime fluctuates from hour to hour. They are the main limit on coherence.

Every qubit is slightly different. Junction spread makes frequencies vary, so neighboring qubits can collide in frequency, each one needs calibration, and yield falls as qubit counts rise.

Crosstalk and leakage. Unwanted coupling between qubits and control lines grows with density, and the transmon's small level unevenness lets population leak to a third level, which standard error correction does not expect.

Radiation. Cosmic rays and natural radioactivity create bursts of quasiparticles that cause correlated errors across a chip.

Error-correction overhead. A surface code needs hundreds to more than a thousand physical qubits per high-quality logical qubit at today's error rates. Willow's distance-7 logical qubit used 101 qubits and reached about 0.14% logical error per cycle.

What could solve it

Better materials. Tantalum films, high-resistivity silicon and cleaner surfaces reduce defect losses; they are behind Princeton's millisecond transmon.

Control inside the refrigerator. Cryogenic CMOS controllers at 4 kelvin, superconducting logic, flexible ribbon cables and multiplexed readout all reduce the number of lines per qubit.

Modular chips and longer links. IBM has shown long-range on-chip couplers in its Loon test chip and plans couplers between modules from 2027; Rigetti tiles chiplets.

Leaner codes. IBM's bivariate bicycle "gross" code is designed to store 12 logical qubits in about 288 physical qubits, roughly ten times fewer than a surface code for similar protection, but it needs long-range connections. Bosonic qubits change the error budget: AWS's Ocelot chip ran a distance-5 repetition code of cat qubits, and dual-rail designs turn most errors into erasures that are cheaper to correct.

Faster decoding. IBM reports decoding its codes in real time in under 480 ns.

Strengths and limits

Strengths. Gates of tens of nanoseconds and error-correction cycles near 1 µs, about 1,000 to 10,000 times faster per round than neutral atoms; fabrication with semiconductor tools, including 300 mm fabs; a leading error-correction record, from a below-threshold surface code to bosonic codes beyond break-even; and mature cloud access and software.

Limits. A dilution refrigerator at about 10 mK and heavy wiring; mostly nearest-neighbor connectivity, with about four neighbors per qubit on a square lattice; coherence of about a tenth of a millisecond in typical processors, far shorter than ions or atoms; per-qubit calibration; correlated errors from radiation; and a large error-correction overhead for transmon surface codes.

Key numbers

Operating temperature: about 10 mK (coldest stage 7 to 15 mK).

Two-qubit gates: 25 to 70 ns; 99.67% average across Willow; best peer-reviewed pairs 99.90% (transmon, RIKEN and Toshiba) and 99.92% (fluxonium, MIT).

Single-qubit gates: 20 to 50 ns; 99.97% (Willow); 99.998% (MIT fluxonium).

Readout: 200 to 800 ns at 99 to 99.5% in large processors.

Coherence (T1): 68 µs average on Willow; 1.68 ms for the best transmon (Princeton, 2025).

Error-correction cycle: 1.1 µs (Willow).

Bosonic qubits: cat bit flips over an hour apart at 11 photons (Alice & Bob, 2025, preliminary), while phase flips still come within microseconds; 8 dual-rail qubits in one system (Quantum Circuits); GKP beyond break-even (Yale, 2023).

Largest processors: IBM Heron 156 qubits, IBM Nighthawk 120, Rigetti Cepheus 108, Google Willow 105. IBM's 2023 Condor demonstration had 1,121 qubits.

Quick answers

Why do superconducting qubits need to be so cold? The metal must superconduct, and the qubit's energy gap, a few gigahertz or about 0.2 to 0.4 K in temperature terms, must sit far above the thermal energy around it. At about 10 mK, stray heat rarely excites the qubit.

What is a transmon? The most widely used superconducting qubit: a Josephson junction shunted by a large capacitor, which makes it insensitive to stray electric charge. Google's and IBM's processors use transmons.

How fast is a superconducting quantum computer? Gates take tens of nanoseconds, and Google's Willow completes a full error-correction cycle in 1.1 µs, about 909,000 cycles a second.

What is the difference between a transmon and a fluxonium? A transmon is a junction shunted by a large capacitor, running at 4 to 6 GHz with levels only slightly uneven. A fluxonium adds a superinductor and is biased at half a flux quantum, which lowers its frequency to 0.1 to 1 GHz and makes its levels far more uneven: less leakage and long coherence, but more thermal excitation and harder fabrication.

What are bosonic qubits? Qubits stored in the microwave light of a resonator rather than in the levels of a junction circuit: cat, dual-rail and GKP qubits. Each shapes its errors so that they are cheaper to correct, by biasing them, flagging them or correcting small shifts as they happen.

What limits superconducting qubits today? Wiring and cooling for large numbers of qubits, material defects that limit coherence, and the number of physical qubits that error correction needs.

Sources

Google Quantum AI, Willow spec sheet (2024)

Princeton University, tantalum-on-silicon transmon (November 2025)

Li et al. (RIKEN and Toshiba), 99.90% CZ gate with a double-transmon coupler, PRX 14, 041050 (2024)

MIT, fluxonium two-qubit gates with a transmon coupler, PRX 13, 031035 (2023)

MIT, 99.998% single-qubit fidelity on fluxonium (January 2025)

IBM, Nighthawk and Loon processors (November 2025)

Rigetti, Cepheus-1-108Q general availability (April 2026)

Putterman et al. (AWS), cat-qubit error correction with Ocelot, Nature (2025)

Alice & Bob, bit-flip times above one hour, preliminary (September 2025)

Review: developments in superconducting erasure qubits (2026)

University of Maryland, millisecond coherence in a fluxonium qubit (arXiv 2103.08578)

Gyenis et al. (Princeton), experimental realization of a protected 0-π qubit, PRX Quantum (2021)

Quantum Circuits, dual-rail qubits that detect their own errors

Google and Yale, error-corrected GKP qudits beyond break-even (May 2025)

Google acquires Atlantic Quantum (October 2025)

Tech Times, Alice & Bob ships Helium, an 18-cat-qubit system (June 2026)

The Quantum Insider, D-Wave to acquire Quantum Circuits (January 2026)

About Anyon Computing

Anyon Computing Inc. (also known as Anyon Technologies) is a quantum computing company that provides superconducting modular quantum supercomputers, which it tightly couples with NVIDIA GPUs via NVQLink for data center deployment at scale. Anyon pioneered deploying NVIDIA NVQLink inside a commercial production data center and is among the first superconducting QPU backends integrated with NVIDIA CUDA-Q. Founded by pioneers from Caltech and UC Berkeley. https://www.anyoncomputing.com/

NVIDIA, CUDA-Q and NVQLink are trademarks and/or registered trademarks of NVIDIA Corporation in the U.S. and other countries. Other company and product names may be trademarks of the respective companies with which they are associated.